1. Field of the Invention
The field of the invention is data processing, or, more specifically, methods, apparatus, and products for dynamically allocating communication lanes for a plurality of input/output (‘I/O’) adapter sockets in a point-to-point, serial I/O expansion subsystem of a computing system such as, for example, a PCI Express expansion subsystem.
2. Description of Related Art
A PCI Express (‘PCIe’) expansion subsystem is an implementation of the Peripheral Components Interconnect (‘PCI’) expansion subsystem according to the set of PCIe specifications promulgated by the PCI Special Interest Group (‘PCI SIG’). A PCIe expansion subsystem uses existing PCI programming and software concepts, but is based on a different and much faster serial physical-layer communications protocol. The physical-layer consists not of a bus, but of a network of serial interconnections extending to each device from a switch. The switch provides point-to-point communications between devices connected to the switch. These devices may be I/O adapters or other switches. I/O adapters and switches operating according to the PCIe specifications are generally referred to as ‘PCIe adapters’ and ‘PCIe switches’ respectively, and any device, whether an I/O adapter or a switch, operating according to the PCIe specifications is generally referred to as ‘PCIe device.’
A connection between any two PCIe devices is referred to as a ‘link.’ A link consists of a collection of one or more lanes used for data communications between devices. In a PCIe expansion subsystem, each lane is a set of two unidirectional low voltage differential signaling pairs of transmission pathways such as, for example, traces along a motherboard. Because transmitting data and receiving data are implemented using separate differential pairs, each lane allows for dual-simplex serial data communication of up to five gigabits of data per second.
All PCIe adapters must minimally support single-lane links. PCIe adapters may optionally support wider links composed of two, four, eight, twelve, sixteen, or thirty-two lanes by providing additional pins on the hardware interface of the device that plug into a PCIe adapter socket. A PCIe adapter socket is an I/O adapter socket manufactured according to the PCIe specifications and may physically support connections for one, two, four, eight, twelve, sixteen, or thirty-two lanes in a manner similar to PCIe adapters. A PCIe adapter may be physically inserted into any PCIe adapter socket that supports the same or a greater number of lanes as the lanes supported by the PCIe adapter. For example, a PCIe adapter physically supporting eight lanes may be installed in to a PCIe adapter socket physically supporting eight, twelve, sixteen, or thirty-two lanes. Such an eight lane PCIe adapter, however, cannot be physically installed in a one, two, or four lane PCIe adapter socket.
Although a PCIe adapter and the PCIe adapter socket into which the adapter is installed may physically support links with up to thirty-two lanes, a PCIe adapter may utilize fewer lanes for data communication than the maximum number of lanes physically supported by the adapter and the adapter socket. For example, a PCIe adapter may physically support eight lanes and be installed in a PCIe adapter socket physically supporting sixteen lanes. The eight lane PCIe adapter may, however, only utilize one, two, or four of those eight lanes it supports for data communications with other PCIe devices. The number of lanes actually utilized for the data communications link between two devices is typically the highest number of lanes mutually supported by the PCIe adapter and the other PCIe device.
The current chipsets implementing the PCIe switch that provides the point-to-point communications between devices support only a fixed number of communications lanes. Because different computing systems typically have different I/O adapter requirements, the manner in which a chipset allocates communications lanes among PCIe adapter sockets may vary from system to system. For example consider that the PCIe switch supports only seventeen communication lanes. In a workstation, these lanes provided by the PCIe switch are typically connected to two PCIe connectors: a sixteen lane connector and a one lane connector. Often, a high end video graphics adapter is installed in the sixteen lane PCIe connector and some other PCIe device is installed in the one lane PCIe connector. Such a configuration works well in computer systems where the performance of the video graphics adapter is most important. In other computing systems, however, other allocations of the seventeen physical lanes may be preferred. In a server system, for example, allocating the seventeen lanes to three or more PCIe connectors may be preferred to provide the server system with one connector for installing a video adapter and two or more connectors to provide redundant network adapters or redundant storage drive adapters. That is, in the server configuration, computer architects prefer to have more PCIe connectors connecting to the switch that provide redundancy over the workstation configuration that provides a single high-bandwidth PCIe connector. Although the same chipset is used to implement the seventeen lane PCIe switch in either the workstation or the server configuration, the number of PCIe connectors and the electrical connections between the connectors and the switch are different for the workstation configuration and the server configuration. Because of the contrasting requirements of these two configurations, these two configurations cannot currently be supported by the same motherboard configuration. Rather, two separate motherboards with two distinct configurations must be designed and manufactured to support both of the above configurations.